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Message-ID: <AANLkTik3ujs7-tMNUuk33wuMXFm+iusspMcR=yjPXtn_@mail.gmail.com>
Date: Fri, 19 Nov 2010 19:54:07 +0800
From: huang ying <huang.ying.caritas@...il.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Huang Ying <ying.huang@...el.com>, Len Brown <lenb@...nel.org>,
linux-kernel@...r.kernel.org, Andi Kleen <andi@...stfloor.org>,
linux-acpi@...r.kernel.org,
Andrew Morton <akpm@...ux-foundation.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Ingo Molnar <mingo@...e.hu>,
Mauro Carvalho Chehab <mchehab@...hat.com>,
Borislav Petkov <bp@...en8.de>,
Thomas Gleixner <tglx@...utronix.de>,
Tony Luck <tony.luck@...el.com>
Subject: Re: [PATCH 0/2] Generic hardware error reporting support
On Fri, Nov 19, 2010 at 7:22 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Fri, 2010-11-19 at 16:10 +0800, Huang Ying wrote:
>> Hi, Len,
>>
>> This is used by APEI ERST and GEHS. But it is a generic hardware
>> error reporting mechanism and can be used by other hardware error
>> reporting mechanisms such as EDAC, PCIe AER, Machine Check, etc.
>>
>> The patchset is split from the original APEI patchset to make it
>> explicit that this is a generic mechanism, not APEI specific bits.
>>
>> [PATCH 1/2] Generic hardware error reporting mechanism
>> [PATCH 2/2] Hardware error record persistent support
>
> You call it generic, does that mean the EDAC guys agree, does it work on
> AMD and IA64?
I call it "generic", because it can be used by EDAC, PCIe AER, Machine
Check, etc to report hardware errors, and it can work on AMD and
IA64.
> If not, Tony could you please apply a cluebat? I thought Intel was going
> to sit around the table with all hardware error people and come up with
> a unified thing at LPC?
Best Regards,
Huang Ying
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