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Message-ID: <CEE6BB42CAD6E947908279175AF8470A074DE04727@EXDCVYMBSTM006.EQ1STM.local>
Date: Fri, 19 Nov 2010 22:49:50 +0100
From: Linus WALLEIJ <linus.walleij@...ricsson.com>
To: "catalin.marinas@....com" <catalin.marinas@....com>,
"kmpark@...radead.org" <kmpark@...radead.org>
Cc: Robert FEKETE <robert.fekete@...ricsson.com>,
Johan MOSSBERG <johan.xx.mossberg@...ricsson.com>,
Srinidhi KASAGAR <srinidhi.kasagar@...ricsson.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"santosh.shilimkar@...com" <santosh.shilimkar@...com>,
"linux@....linux.org.uk" <linux@....linux.org.uk>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"tony@...mide.com" <tony@...mide.com>
Subject: Re: Re: [PATCH] ARM: l2x0: Check the correct address range
On Fri, 2010-11-19 at 11:08 +0000, Catalin Marinas wrote:
> On 19 November 2010 01:40, Kyungmin Park <kmpark@...radead.org> wrote:
> > From: Boojin Kim <boojin.kim@...sung.com>
> >
> > When flush or clean the 1MiB, it doesn't flush or clean all since it doesn't check the correct address. So Check the correct address range.
>
> This line is very long.
>
> The patch looks fine otherwise. I think the optimal value would be
> smaller than the whole cache size but it depends on many things.
Would it be a good idea to kick in a per-SoC threshold value into
the l2x0 range clean function, such that if the range exceed this
specific threshold it cleans all of it? That way it'd be possible
to optimize for each SoC quite easily.
I've heard that these things may even depend on OPPs etc so it may
even be some dynamic value...
Yours,
Linus Walleij
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