linux-kernel - Re: [thiscpuops upgrade 10/10] Lockless (and preemptless) fastpaths for slub

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Date:	Wed, 24 Nov 2010 18:37:19 +0200
From:	Pekka Enberg <penberg@...nel.org>
To:	Christoph Lameter <cl@...ux.com>
Cc:	akpm@...ux-foundation.org, Pekka Enberg <penberg@...helsinki.fi>,
	Ingo Molnar <mingo@...e.hu>,
	Peter Zijlstra <peterz@...radead.org>,
	linux-kernel@...r.kernel.org,
	Eric Dumazet <eric.dumazet@...il.com>,
	Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
	Tejun Heo <tj@...nel.org>
Subject: Re: [thiscpuops upgrade 10/10] Lockless (and preemptless) fastpaths
 for slub

On Wed, Nov 24, 2010 at 6:17 PM, Christoph Lameter <cl@...ux.com> wrote:
> On Wed, 24 Nov 2010, Pekka Enberg wrote:
>
>> > +       /*
>> > +        * The transaction ids are globally unique per cpu and per operation on
>> > +        * a per cpu queue. Thus they can be guarantee that the cmpxchg_double
>> > +        * occurs on the right processor and that there was no operation on the
>> > +        * linked list in between.
>> > +        */
>> > +       tid = c->tid;
>> > +       barrier();
>>
>> You're using a compiler barrier after every load from c->tid. Why?
>
> To make sure that the compiler does not do something like loading the tid
> later. The tid must be obtained before the rest of the information from
> the per cpu slab data is retrieved in order to ensure that we have a
> consistent set of data to operate on.
>
> The critical section begins with the retrieval of the tid and it ends with
> the replacement of the tid with the newly generated one. This means that
> all state data for the alloc and free operation needs to be retrieved in
> that critical section. The change must be saved with the final
> cmpxchg_double of the critical section.

Right and we don't need a *memory barrier* here because we're
accessing a per-CPU variable which means operations appear in-order.

                        Pekka
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