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Message-Id: <1290565314.5506.4.camel@mola>
Date:	Wed, 24 Nov 2010 10:21:54 +0800
From:	Axel Lin <axel.lin@...il.com>
To:	linux-kernel <linux-kernel@...r.kernel.org>
Cc:	Liam Girdwood <lrg@...mlogic.co.uk>,
	Mark Brown <broonie@...nsource.wolfsonmicro.com>
Subject: [PATCH 2/2] ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <=
	16500000
MCLKDIV bit of Register 04h Clocking1:
	0 : Divide by 1
	1 : Divide by 2
Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.
Signed-off-by: Axel Lin <axel.lin@...il.com>
---
 sound/soc/codecs/wm8961.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/codecs/wm8961.c b/sound/soc/codecs/wm8961.c
index e4638e6..6b22ef2 100644
--- a/sound/soc/codecs/wm8961.c
+++ b/sound/soc/codecs/wm8961.c
@@ -735,7 +735,7 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 		freq /= 2;
 	} else {
 		dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
-		reg &= WM8961_MCLKDIV;
+		reg &= ~WM8961_MCLKDIV;
 	}
 
 	snd_soc_write(codec, WM8961_CLOCKING1, reg);
-- 
1.7.2
--
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