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Message-ID: <Pine.LNX.4.44L0.1011251521310.26094-100000@netrider.rowland.org>
Date:	Thu, 25 Nov 2010 15:22:06 -0500 (EST)
From:	Alan Stern <stern@...land.harvard.edu>
To:	Greg KH <gregkh@...e.de>
cc:	Anton Vorontsov <cbouatmailru@...il.com>, <mkl0301@...il.com>,
	<linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<dbrownell@...rs.sourceforge.net>, <linux-usb@...r.kernel.org>
Subject: Re: [PATCH v3 1/1] USB: cns3xxx: Add EHCI and OHCI bus glue for
 cns3xxx SOCs

On Thu, 25 Nov 2010, Greg KH wrote:

> On Thu, Nov 25, 2010 at 07:21:58PM +0300, Anton Vorontsov wrote:
> > On Thu, Nov 25, 2010 at 11:58:00PM +0800, mkl0301@...il.com wrote:
> > > From: Mac Lin <mkl0301@...il.com>
> > > 
> > > The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers. This
> > > patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd drivers to
> > > work on CNS3XXX
> > > 
> > > The EHCI and OHCI controllers share a common clock control and reset bit,
> > > therefore additional check for the timming of enabling and disabling is
> > > required. The USB bit of PLL Power Down Control is also shared by OTG, 24MHz
> > > UART clock, Crypto clock, PCIe reference clock, and Clock Scale Generator.
> > > Therefore we only ensure it is enabled, while not disabling it.
> > > 
> > > Signed-off-by: Mac Lin <mkl0301@...il.com>
> > 
> > Thanks for the patch!
> > 
> > Cc'ing Greg.
> > 
> > Greg, the patch doesn't touch any sensitive parts of EHCI and OHCI
> > drivers, can I take it via ARM subtree? This is to not introduce
> > cross-tree dependencies (the patch depends on some arch-specific
> > changes).
> 
> Please get Alan Stern to ack it as well, as he knows the proper
> callbacks that you need to ensure are present.

As far as the callbacks are concerned, this looks fine.

Acked-by: Alan Stern <stern@...land.harvard.edu>

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