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Message-ID: <20101127152026.GA15758@Krystal>
Date: Sat, 27 Nov 2010 10:20:26 -0500
From: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To: Christoph Lameter <cl@...ux.com>
Cc: akpm@...ux-foundation.org, Pekka Enberg <penberg@...helsinki.fi>,
linux-kernel@...r.kernel.org,
Eric Dumazet <eric.dumazet@...il.com>,
Tejun Heo <tj@...nel.org>
Subject: Re: [thisops uV2 09/10] x86: this_cpu_cmpxchg and
this_cpu_cmpxchg_double operations
* Christoph Lameter (cl@...ux.com) wrote:
> Provide support as far as the hardware capabilities of the x86 cpus
> allow.
>
> V1->V2:
> - Mark %rdx clobbering during cmpxchg16b
> - Provide emulation of cmpxchg16b for early AMD processors
>
> Signed-off-by: Christoph Lameter <cl@...ux.com>
[...]
> +/*
> + * Something is screwed up with alternate instruction creation. This one
> + * fails with a mysterious asm error about a byte val > 255.
Hrm, "interesting" ;) Does each of these work if expressed directly in inline
assembly without the alternatives ? Can you give us more information about the
failure ?
> + */
> +#define percpu_cmpxchg16b(pcp, o1, o2, n1, n2) \
> +({ \
> + char __ret; \
> + typeof(o1) __o1 = o1; \
> + typeof(o1) __n1 = n1; \
> + typeof(o2) __o2 = o2; \
> + typeof(o2) __n2 = n2; \
> + typeof(o2) __dummy; \
> + VM_BUG_ON(((unsigned long)pcp) % 16); \
Restricting typing on "pcp" at build time might be more appropriate. E.g.
creating a "struct doublecas" that would be forcefully aligned on 16 bytes. We
could check that with __builtin_types_compatible_p and generate a build failure
if necessary.
Thanks,
Mathieu
> + alternative_io("call cmpxchg16b_local\n\t" P6_NOP4, \
> + "cmpxchg16b %%gs:(%%rsi)\n\tsetz %0\n\t", \
> + X86_FEATURE_CX16, \
> + ASM_OUTPUT2("=a"(__ret), "=d"(__dummy)), \
> + "S" (pcp), "b"(__n1), "c"(__n2), \
> + "a"(__o1), "d"(__o2)); \
> + __ret; \
> +})
--
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com
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