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Message-ID: <1291213631.32004.1563.camel@laptop>
Date: Wed, 01 Dec 2010 15:27:11 +0100
From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: Andi Kleen <andi@...stfloor.org>
Cc: eranian@...gle.com, linux-kernel@...r.kernel.org, x86@...nel.org,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 3/4] perf-events: Add support for supplementary event
registers v3
On Thu, 2010-11-18 at 11:47 +0100, Andi Kleen wrote:
> @@ -876,6 +944,8 @@ static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
> u64 enable_mask)
> {
> wrmsrl(hwc->config_base + hwc->idx, hwc->config | enable_mask);
> + if (hwc->extra_reg)
> + wrmsrl(hwc->extra_reg, hwc->extra_config);
> }
I thought we agreed it made more sense to program the extra msr before
enabling the counter.
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