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Message-ID: <AANLkTikpjq-8BVanF5W76j0ZdDBur8DyHWSH8GGgJBQs@mail.gmail.com>
Date: Thu, 2 Dec 2010 15:19:05 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: Anton Vorontsov <avorontsov@...sta.com>,
Kukjin Kim <kgene.kim@...sung.com>,
Srinidhi Kasagar <srinidhi.kasagar@...ricsson.com>,
Tony Lindgren <tony@...mide.com>,
Jamie Iles <jamie.iles@...ochip.com>,
Colin Cross <ccross@...roid.com>, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, linux-tegra@...r.kernel.org,
linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/8] ARM: SCU: Add common routines for secondary CPU bootup
On 1 December 2010 00:25, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Tue, Nov 30, 2010 at 11:32:04PM +0000, Russell King - ARM Linux wrote:
>> Note that I'll go with factoring this out into arch/arm/kernel/smp_scu.c
>> for the time being, but I'm not convinced about the other parts yet.
>
> IOW, something like the attached. I've gone a little further and removed
> the now unnecessary scu_enable() and scu_get_core_count() global functions,
> making scu_enable() static, and eliminating scu_get_core_count() entirely.
There is some benefit in leaving get_core_count() in the platform
code. For example, the SCU on Cortex-A15 doesn't expose the core count
register and we have to get it from somewhere else (for now from some
L2 cache controller register but in the future it may be hardcoded,
passed via FDT or simply trying to boot maxcpus).
--
Catalin
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