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Message-ID: <1291307320.11271.51.camel@e102109-lin.cambridge.arm.com>
Date: Thu, 02 Dec 2010 16:28:40 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: Anton Vorontsov <avorontsov@...sta.com>,
Kukjin Kim <kgene.kim@...sung.com>,
Srinidhi Kasagar <srinidhi.kasagar@...ricsson.com>,
Tony Lindgren <tony@...mide.com>,
Jamie Iles <jamie.iles@...ochip.com>,
Colin Cross <ccross@...roid.com>, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, linux-tegra@...r.kernel.org,
linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/8] ARM: SCU: Add common routines for secondary CPU
bootup
On Thu, 2010-12-02 at 15:24 +0000, Russell King - ARM Linux wrote:
> On Thu, Dec 02, 2010 at 03:19:05PM +0000, Catalin Marinas wrote:
> > On 1 December 2010 00:25, Russell King - ARM Linux
> > <linux@....linux.org.uk> wrote:
> > > On Tue, Nov 30, 2010 at 11:32:04PM +0000, Russell King - ARM Linux wrote:
> > >> Note that I'll go with factoring this out into arch/arm/kernel/smp_scu.c
> > >> for the time being, but I'm not convinced about the other parts yet.
> > >
> > > IOW, something like the attached. I've gone a little further and removed
> > > the now unnecessary scu_enable() and scu_get_core_count() global functions,
> > > making scu_enable() static, and eliminating scu_get_core_count() entirely.
> >
> > There is some benefit in leaving get_core_count() in the platform
> > code. For example, the SCU on Cortex-A15 doesn't expose the core count
> > register and we have to get it from somewhere else (for now from some
> > L2 cache controller register but in the future it may be hardcoded,
> > passed via FDT or simply trying to boot maxcpus).
>
> I notice that there's no way to tell what revision of SCU is implemented
> on _any_ mpcore platform.
C-A15 doesn't have any SCU registers exposed (and it's enabled by
default).
> In light of that, I think there's no point what so ever trying to
> consolidate this code - even the control register bits vary in
> unpredictable ways between different MPcore implementations.
The SCU is part of the core TRM, so I don't expect it to be the same
across various MP cores (and A15 is an example).
You may want to consolidate functions like scu_prepare_cpus (maybe call
it smp_prepare_cpus) and something that calls set_cpu_possible() but
with platform callbacks for getting the number of calls and initialising
the SMP (SCU for most platforms).
Whether this is worth, I don't know.
--
Catalin
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