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Message-ID: <1291267178.2405.311.camel@minggr.sh.intel.com>
Date: Thu, 02 Dec 2010 13:19:38 +0800
From: Lin Ming <ming.m.lin@...el.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Stephane Eranian <eranian@...gle.com>,
Andi Kleen <andi@...stfloor.org>
Cc: Ingo Molnar <mingo@...e.hu>,
Frederic Weisbecker <fweisbec@...il.com>,
Arjan van de Ven <arjan@...radead.org>,
lkml <linux-kernel@...r.kernel.org>
Subject: [RFC PATCH 0/3 v3] perf: Add Intel Nehalem uncore pmu support
Hi, all
Here are the v3 patches to add uncore pmu support to perf, applied on
top of current tip/master(74f6deb).
Changelogs of v3:
- Allocate uncore data with kmalloc_node, like AMD NB stuff. (Peter
Zijlstra)
- per-task uncore event is not allowed. Simply set pmu::task_ctx_nr =
perf_invalid_context. (Peter Zijlstra)
- Route interrupts to the first core that accesses uncore pmu. (Stephane
Eranian)
- Check CPUID signatures with boot_cpu_data. (Andi Kleen)
- Remove unneeded include files. (Andi Kleen)
Changelogs of v2:
- modify the NMI handling code to handle all counters enabled by all 4
cores.
- allocate uncore_events[] table dynamically using kmalloc_node() to
avoid unnecessary remote memory accesses. (Stephane Eranian)
- add support for the fixed uncore counter. (Stephane Eranian)
- Handling of exclude_* bits. Uncore PMU measures at all privilege level
all the time. So it doesn't make sense to specify any exclude bits.
(Stephane Eranian)
- let uncore code be more self contained, that is, not include it in
arch/x86/kernel/cpu/perf_event.c (Peter Zijlstra)
- uncore pmu interrupt have its own NMI_DIE notifier entry. (Peter
Zijlstra)
Known bugs:
- When hyper thread is enabled, both HTs will receive the NMI. In this
case, the overflow status bits are not acked correctly.
TODO:
- Add support for uncore address/opcode match thing
- Add a new sub-command for uncore events statistics.
For example, perf package -p <package-id> -e <event>
As usual, any comment is very appreciated.
Lin Ming
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