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Message-ID: <4CFCC048.4030408@ru.mvista.com>
Date:	Mon, 06 Dec 2010 13:51:52 +0300
From:	Sergei Shtylyov <sshtylyov@...sta.com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	Paulius Zaleckas <paulius.zaleckas@...il.com>,
	Hans Ulli Kroll <ulli.kroll@...glemail.com>,
	Russell King <linux@....linux.org.uk>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: Gemini: Add support for PCI BUS

Hello.

On 29-11-2010 19:45, Arnd Bergmann wrote:

>>> The I/O ordering is probably not what you think it is.
>>> There is no ordering guarantee between __raw_writel and
>>> spin_lock/spin_unlock, so you really should be using
>>> readl/writel.

>> No he really should NOT use readl/writel. The ONLY difference
>> between readl/writel and __raw_readl/__raw_writel is endianess
>> conversion. __raw_*l is not doing it. Which to use depend only
>> on HW.

> There are many differences between readl and __raw_readl, including

> * __raw_readl does not have barriers and does not serialize with
>    spinlocks, so it breaks on out-of-order CPUs.
> * __raw_readl does not have a specific endianess, while readl is
>    fixed little-endian,

    I know I'm late but readl()/writel() are CPU-endian, not LE.

WBR, Sergei
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