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Message-Id: <20101208005736.820222445@clark.site>
Date:	Tue, 07 Dec 2010 16:58:51 -0800
From:	Greg KH <gregkh@...e.de>
To:	linux-kernel@...r.kernel.org, stable@...nel.org
Cc:	stable-review@...nel.org, torvalds@...ux-foundation.org,
	akpm@...ux-foundation.org, alan@...rguk.ukuu.org.uk,
	Axel Lin <axel.lin@...il.com>,
	Liam Girdwood <lrg@...mlogic.co.uk>,
	Mark Brown <broonie@...nsource.wolfsonmicro.com>
Subject: [154/289] ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000

2.6.36-stable review patch.  If anyone has any objections, please let us know.

------------------

From: Axel Lin <axel.lin@...il.com>

commit 2f7dceeda4708f470fd927adb3861bd8ebbe2310 upstream.

MCLKDIV bit of Register 04h Clocking1:
	0 : Divide by 1
	1 : Divide by 2

Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.

Signed-off-by: Axel Lin <axel.lin@...il.com>
Acked-by: Liam Girdwood <lrg@...mlogic.co.uk>
Signed-off-by: Mark Brown <broonie@...nsource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...e.de>

---
 sound/soc/codecs/wm8961.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/sound/soc/codecs/wm8961.c
+++ b/sound/soc/codecs/wm8961.c
@@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_
 		freq /= 2;
 	} else {
 		dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
-		reg &= WM8961_MCLKDIV;
+		reg &= ~WM8961_MCLKDIV;
 	}
 
 	snd_soc_write(codec, WM8961_CLOCKING1, reg);


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