linux-kernel - [tip:x86/urgent] x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode

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Message-ID: <tip-086e8ced65d9bcc4a8e8f1cd39b09640f2883f90@git.kernel.org>
Date:	Tue, 14 Dec 2010 01:16:20 GMT
From:	tip-bot for Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	kaneshige.kenji@...fujitsu.com, indou.takao@...fujitsu.com,
	chrisw@...s-sol.org, suresh.b.siddha@...el.com, tglx@...utronix.de,
	hpa@...ux.intel.com
Subject: [tip:x86/urgent] x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode

Commit-ID:  086e8ced65d9bcc4a8e8f1cd39b09640f2883f90
Gitweb:     http://git.kernel.org/tip/086e8ced65d9bcc4a8e8f1cd39b09640f2883f90
Author:     Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
AuthorDate: Wed, 1 Dec 2010 09:40:32 -0800
Committer:  H. Peter Anvin <hpa@...ux.intel.com>
CommitDate: Mon, 13 Dec 2010 16:52:52 -0800

x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode

In x2apic mode, we need to set the upper address register of the fault
handling interrupt register of the vt-d hardware. Without this
irq migration of the vt-d fault handling interrupt is broken.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
LKML-Reference: <1291225233.2648.39.camel@...iddha-MOBL3>
Signed-off-by: Suresh Siddha <suresh.b.siddha@...el.com>
Cc: stable@...nel.org [v2.6.32+]
Acked-by: Chris Wright <chrisw@...s-sol.org>
Tested-by: Takao Indoh <indou.takao@...fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@...ux.intel.com>
---
 arch/x86/kernel/apic/io_apic.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 226060e..fadcd74 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3412,6 +3412,7 @@ dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
 	msg.data |= MSI_DATA_VECTOR(cfg->vector);
 	msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
 	msg.address_lo |= MSI_ADDR_DEST_ID(dest);
+	msg.address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(dest);
 
 	dmar_msi_write(irq, &msg);
 
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