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Date: Wed, 22 Dec 2010 11:45:01 +0100 From: Peter Zijlstra <a.p.zijlstra@...llo.nl> To: Stephane Eranian <eranian@...gle.com> Cc: Lin Ming <ming.m.lin@...el.com>, Ingo Molnar <mingo@...e.hu>, Andi Kleen <andi@...stfloor.org>, Frederic Weisbecker <fweisbec@...il.com>, Arjan van de Ven <arjan@...radead.org>, lkml <linux-kernel@...r.kernel.org>, paulus <paulus@...ba.org> Subject: Re: [RFC PATCH] perf: Add load latency monitoring on Intel Nehalem/Westmere On Wed, 2010-12-22 at 11:08 +0100, Stephane Eranian wrote: > Yes, I think there is more to it than just data source, unfortunately. > If you want to avoid returning an opaque u64 (PERF_SAMPLE_EXTRA), then > you need to break it down: PERF_SAMPLE_DATA_SRC, PERF_SAMPLE_XX > and so on. I guess we can do things like: Satisfied by {L1, L2, L3, RAM}x{snoop, local, remote} + unknown, and encode "Pending core cache HIT" as L2-snoop or something, whatever is most appropriate. But does that cover every architecture? Also, since that doesn't require more that 4 bits to encode, we could try and categorize what else is around and try and create a well specified _EXTRA register, I mean, we still got 60bits left after this. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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