lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1293686960-12581-1-git-send-email-adharmap@codeaurora.org>
Date:	Wed, 29 Dec 2010 21:29:20 -0800
From:	Abhijeet Dharmapurikar <adharmap@...eaurora.org>
To:	Russell King <linux@....linux.org.uk>
Cc:	Abhijeet Dharmapurikar <adharmap@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Chao Xie <chao.xie@...vell.com>,
	Daniel Walker <dwalker@...eaurora.org>,
	Rabin Vincent <rabin.vincent@...ricsson.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH] GIC: Assign correct flow handler type in set_type callback

There are some interrupts that are true edge triggered in nature. If not
marked IRQ_PENDING, when disabled, they will be lost.

Use the set_type callback to assign the correct flow type handler for
shared peripheral interrupts.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@...eaurora.org>
---
This came to light when a edge triggered interrupt was supposed to wakeup the
sytem. The flow handler was set to the default handle_level_irq. On the resume
path the flow handler was invoked right after the I bit was cleared but before
each individual interrupts were enabled. This made the handle_level_irq ignore
the interrupt (mask_ack it) and it was lost. handle_edge_irq does the right
thing by marking the interrupt as IRQ_PENDING and when the resume code gets to
enabling each interrupt this interrupt is resent again.

 arch/arm/common/gic.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index e6388dc..a83594a 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -136,6 +136,9 @@ static int gic_set_type(unsigned int irq, unsigned int type)
 
 	spin_unlock(&irq_controller_lock);
 
+	if ((type & IRQ_TYPE_EDGE_RISING) && gicirq > 31)
+		__set_irq_handler_unlocked(irq, handle_edge_irq);
+
 	return 0;
 }
 
-- 
1.7.1
Sent by an employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation
Center, Inc. is a member of Code Aurora Forum.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ