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Message-ID: <20110106165107.GL4739@erda.amd.com>
Date: Thu, 6 Jan 2011 17:51:07 +0100
From: Robert Richter <robert.richter@....com>
To: Jan Beulich <JBeulich@...ell.com>, Ingo Molnar <mingo@...e.hu>
CC: "xen-devel@...ts.xensource.com" <xen-devel@...ts.xensource.com>,
Keir Fraser <keir@....org>, LKML <linux-kernel@...r.kernel.org>
Subject: [PATCH] x86, AMD, PCI: Add AMD northbridge PCI device id for CPU
families 12h and 14h
On 06.01.11 07:36:13, Jan Beulich wrote:
> >>> On 06.01.11 at 12:47, Robert Richter <robert.richter@....com> wrote:
> > But I am fine with a setup with pci access for some nb devices, but
> > would rather leave the setup via msrs as a fallback.
>
> Okay, I'll craft something long those lines.
Jan,
the patch below implements the PCI nb device id for AMD cpu families
12h and 14h.
Ingo,
please apply to tip. There are some future use cases that use this PCI
device and we would like to clarify its naming.
Thanks,
-Robert
--
>From f791e16fbbf30d1ab6c66ebb8daa77a6c86bda0b Mon Sep 17 00:00:00 2001
From: Robert Richter <robert.richter@....com>
Date: Thu, 6 Jan 2011 15:01:11 +0100
Subject: [PATCH] x86, AMD, PCI: Add AMD northbridge PCI device id for CPU families 12h and 14h
This patch adds the PCI northbridge device id for AMD CPU families 12h
and 14h. Both families have implemented the same PCI northbridge
device.
Signed-off-by: Robert Richter <robert.richter@....com>
---
include/linux/pci_ids.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index cb845c1..dd7d4e2 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -518,6 +518,7 @@
#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
#define PCI_DEVICE_ID_AMD_15H_NB_MISC 0x1603
+#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
#define PCI_DEVICE_ID_AMD_SCSI 0x2020
--
1.7.3.4
--
Advanced Micro Devices, Inc.
Operating System Research Center
--
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