linux-kernel - Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode

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Message-ID: <AANLkTinzWQyW=A0Z9sPnCYfEdKLNR8wY_+Yzw_8DPTfB@mail.gmail.com>
Date:	Sun, 16 Jan 2011 11:51:47 +0000
From:	Catalin Marinas <catalin.marinas@....com>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Catalin Marinas <catalin.marinas@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Colin Cross <ccross@...roid.com>
Subject: Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode

On Saturday, 15 January 2011, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Sat, Jan 15, 2011 at 03:38:16PM +0000, Catalin Marinas wrote:
>> On 14 January 2011 18:47, Russell King - ARM Linux
>> <linux@....linux.org.uk> wrote:
>> > diff -u b/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
>> > --- b/arch/arm/kernel/entry-armv.S
>> > +++ b/arch/arm/kernel/entry-armv.S
>> > @@ -499,10 +499,11 @@
>> >        blo     __und_usr_unknown
>> >  3:     ldrht   r0, [r4]
>> >        add     r2, r2, #2                      @ r2 is PC + 2, make it PC + 4
>> > -       orr     r0, r0, r5, lsl #16
>> > +       str     r2, [sp, #S_PC]                 @ it's a 2x16bit instr, update
>> > +       orr     r0, r0, r5, lsl #16             @  regs->ARM_pc
>> >        @
>> >        @ r0 = the two 16-bit Thumb instructions which caused the exception
>> > -       @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc+2)
>> > +       @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc)
>> >        @ r4 = PC value for the first 16-bit Thumb instruction
>> >        @
>> >  #else
>>
>> Do we need to modify the VFP entry code to avoit the store to ARM_pc?
>
> The one after the sub #4 instruction?

No, I misread the code, we still need the one after sub #4.


-- 
Catalin
--
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