linux-kernel - Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20110123155157.GD30094@n2100.arm.linux.org.uk>
Date:	Sun, 23 Jan 2011 15:51:57 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Catalin Marinas <catalin.marinas@....com>
Cc:	Colin Cross <ccross@...roid.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: vfp: Fix up exception location in Thumb mode

On Sun, Jan 16, 2011 at 11:49:21AM +0000, Catalin Marinas wrote:
> On Saturday, 15 January 2011, Russell King - ARM Linux
> <linux@....linux.org.uk> wrote:
> > It's a reveq, so I thought we should cover all the instructions with
> > an 'eq' conditional for thumb.
> 
> If the it instruction doesn't cover all instructions, gas generates
> some more its. But in this case, for little endian, the it instruction
> covers more since reveq isn't included and having the beq not last in
> the block I think is unpredictable. If you really want to optimise the
> big endian case not to have an additional it generated by gas, you can
> write ittt so that beq is included with little endian but not with big
> endian. I wouldn't bother much for an extra it anyway.

I think the itttt is correct.  Unless you wish to illustrate why you
think it's wrong by pasting the code and showing why you think the
beq isn't the last instruction...

> >         tst     r3, #PSR_T_BIT
> >         subeq   r4, r2, #4
> > 1:      ldreqt  r0, [r4]
> >         reveq   r0, r0
> >         beq     call_fpe
> 
> You can have the T bit set but the instruction a 32-bit Thumb in which
> case r2 is in the middle of such instruction rather than the next.
> Unless you only refer to the ARM mode, in which case the comment is
> fine.

So?  I'm confused why you're making a mountain out of apparantly
nothing.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/