linux-kernel - [tip:perf/urgent] perf: Fix Pentium4 raw event validation

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Message-ID: <tip-3284063535adb5ca02e7ad51d7556193fb8e799e@git.kernel.org>
Date:	Wed, 26 Jan 2011 07:26:00 GMT
From:	tip-bot for Stephane Eranian <eranian@...gle.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, eranian@...gle.com, hpa@...or.com,
	mingo@...hat.com, gorcunov@...nvz.org, tglx@...utronix.de,
	mingo@...e.hu
Subject: [tip:perf/urgent] perf: Fix Pentium4 raw event validation

Commit-ID:  3284063535adb5ca02e7ad51d7556193fb8e799e
Gitweb:     http://git.kernel.org/tip/3284063535adb5ca02e7ad51d7556193fb8e799e
Author:     Stephane Eranian <eranian@...gle.com>
AuthorDate: Tue, 25 Jan 2011 17:32:01 +0200
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Wed, 26 Jan 2011 08:01:20 +0100

perf: Fix Pentium4 raw event validation

This patch fixes some issues with raw event validation on
Pentium 4 (Netburst) based processors.

As I was testing libpfm4 Netburst support, I ran into two
problems in the p4_validate_raw_event() function:

   - the shared field must be checked ONLY when HT is on
   - the binding to ESCR register was missing

The second item was causing raw events to not be encoded
correctly compared to generic PMU events.

With this patch, I can now pass Netburst events to libpfm4
examples and get meaningful results:

  $ task -e global_power_events:running:u  noploop 1
  noploop for 1 seconds
  3,206,304,898 global_power_events:running

Signed-off-by: Stephane Eranian <eranian@...gle.com>
Acked-by: Cyrill Gorcunov <gorcunov@...nvz.org>
Cc: peterz@...radead.org
Cc: paulus@...ba.org
Cc: davem@...emloft.net
Cc: fweisbec@...il.com
Cc: perfmon2-devel@...ts.sf.net
Cc: eranian@...il.com
Cc: robert.richter@....com
Cc: acme@...hat.com
Cc: gorcunov@...il.com
Cc: ming.m.lin@...el.com
LKML-Reference: <4d3efb2f.1252d80a.1a80.ffffc83f@...google.com>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event_p4.c |   12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index e56b9bf..f7a0993 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -682,7 +682,7 @@ static int p4_validate_raw_event(struct perf_event *event)
 	 * if an event is shared accross the logical threads
 	 * the user needs special permissions to be able to use it
 	 */
-	if (p4_event_bind_map[v].shared) {
+	if (p4_ht_active() && p4_event_bind_map[v].shared) {
 		if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
 			return -EACCES;
 	}
@@ -727,7 +727,8 @@ static int p4_hw_config(struct perf_event *event)
 		event->hw.config = p4_set_ht_bit(event->hw.config);
 
 	if (event->attr.type == PERF_TYPE_RAW) {
-
+		struct p4_event_bind *bind;
+		unsigned int esel;
 		/*
 		 * Clear bits we reserve to be managed by kernel itself
 		 * and never allowed from a user space
@@ -743,6 +744,13 @@ static int p4_hw_config(struct perf_event *event)
 		 * bits since we keep additional info here (for cache events and etc)
 		 */
 		event->hw.config |= event->attr.config;
+		bind = p4_config_get_bind(event->attr.config);
+		if (!bind) {
+			rc = -EINVAL;
+			goto out;
+		}
+		esel = P4_OPCODE_ESEL(bind->opcode);
+		event->hw.config |= p4_config_pack_cccr(P4_CCCR_ESEL(esel));
 	}
 
 	rc = x86_setup_perfctr(event);
--
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