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Message-ID: <1296949549.2349.845.camel@pasglop>
Date:	Sun, 06 Feb 2011 10:45:49 +1100
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	"R. Herbst" <ruediger.herbst@...glemail.com>
Cc:	linux-kernel@...r.kernel.org, David Miller <davem@...emloft.net>,
	Matt <jackdachef@...il.com>, geert@...ux-m68k.org
Subject: Re: Sun GEM PPC32 Bug?


> If I find some time tonight, else tomorrow, I'll whip up a couple of
> patches:
> 
>  - One simpler re-arranging our Rx reset sequence and adding a test for
> the overflow bit at the end, printing out the results, etc... 
> 
>  - One that basically always reset the chip on overflow.

Actually, the second one is trivial, just modify gem_rxmac_interrupt()
as follow:

	if (rxmac_stat & MAC_RXSTAT_OFLW) {
		u32 smac = readl(gp->regs + MAC_SMACHINE);

		netdev_err(dev, "RX MAC fifo overflow smac[%08x]\n", smac);
		gp->net_stats.rx_over_errors++;
		gp->net_stats.rx_fifo_errors++;

-		ret = gem_rxmac_reset(gp);
+		ret = 1;
	}

And tell us if that makes a difference.

Cheers,
Ben.



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