lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4D5544C3.8040306@suse.cz>
Date:	Fri, 11 Feb 2011 15:16:35 +0100
From:	Jiri Slaby <jslaby@...e.cz>
To:	Sergei Shtylyov <sshtylyov@...sta.com>
CC:	jbarnes@...tuousgeek.org, linux-pci@...r.kernel.org,
	linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org,
	jirislaby@...il.com, Bjorn Helgaas <bjorn.helgaas@...com>,
	"David S. Miller" <davem@...emloft.net>,
	Thomas Renninger <trenn@...e.de>,
	Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH option B 2/2] PCI: do not create quirk I/O regions below
 PCIBIOS_MIN_IO for ICH

On 02/11/2011 01:09 PM, Sergei Shtylyov wrote:
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index 8db2426..b3ab2f7 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -554,18 +554,30 @@ static void __devinit quirk_ich4_lpc_acpi(struct
>> pci_dev *dev)
>>       u32 region;
>>       u8 enable;
>>
>> +    /*
>> +     * The check for PCIBIOS_MIN_IO is to ensure we won't create a
>> conflict
>> +     * with low legacy (and fixed) ports. We don't know the decoding
>> +     * priority and can't tell whether the legacy device or the one
>> created
>> +     * here is really at that address.  This happens on boards with
>> broken
>> +     * BIOSes.
>> +    */
>> +
>>       pci_read_config_byte(dev, ICH_ACPI_CNTL,&enable);
>>       if (enable&  ICH4_ACPI_EN) {
>>           pci_read_config_dword(dev, ICH_PMBASE,&region);
>> -        quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
>> -                "ICH4 ACPI/GPIO/TCO");
>> +        region &= PCI_BASE_ADDRESS_IO_MASK;
> 
>    Why don't you do the masking right in the patch #1? And is it really
> necessary if the region size is known to be 128 bytes?

The region here contains also the low flag bits. Yes, it can be a part
of 1/1. But I don't think it matters.

regards,
-- 
js
suse labs
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ