linux-kernel - Re: [PATCH 0/2] jump label: 2.6.38 updates

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Date:	Tue, 15 Feb 2011 11:53:37 +0000
From:	Will Newton <will.newton@...il.com>
To:	paulmck@...ux.vnet.ibm.com
Cc:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>,
	Matt Fleming <matt@...sole-pimps.org>,
	David Miller <davem@...emloft.net>, rostedt@...dmis.org,
	peterz@...radead.org, jbaron@...hat.com, hpa@...or.com,
	mingo@...e.hu, tglx@...utronix.de, andi@...stfloor.org,
	roland@...hat.com, rth@...hat.com, masami.hiramatsu.pt@...achi.com,
	fweisbec@...il.com, avi@...hat.com, sam@...nborg.org,
	ddaney@...iumnetworks.com, michael@...erman.id.au,
	linux-kernel@...r.kernel.org, vapier@...too.org,
	cmetcalf@...era.com, dhowells@...hat.com, schwidefsky@...ibm.com,
	heiko.carstens@...ibm.com, benh@...nel.crashing.org
Subject: Re: [PATCH 0/2] jump label: 2.6.38 updates

On Mon, Feb 14, 2011 at 11:09 PM, Paul E. McKenney
<paulmck@...ux.vnet.ibm.com> wrote:

Hi Paul,

> What CPU family are we talking about here?  For cache coherent CPUs,
> cache coherence really is supposed to work, even for mixed atomic and
> non-atomic instructions to the same variable.

Is there a specific situation you can think of where this would be a
problem? I have to admit to a certain amount of unease with the design
our hardware guys came up with, but I don't have a specific case where
it won't work, just cases where it is less than optimal.
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