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Message-ID: <20110217151223.GJ24627@n2100.arm.linux.org.uk>
Date:	Thu, 17 Feb 2011 15:12:23 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	John Linn <John.Linn@...inx.com>, Jamie Iles <jamie@...ieiles.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	catalin.marinas@....com, glikely@...retlab.ca
Subject: Re: [PATCH V3 3/4] ARM: Xilinx: base header files and assembly
	macros

On Thu, Feb 17, 2011 at 03:41:11PM +0100, Arnd Bergmann wrote:
> On Thursday 17 February 2011, John Linn wrote:
> > > > +
> > > > +#define UART_FIFO_WRITE(base, value) \
> > > > +   (*(volatile unsigned int *)((base) + UART_FIFO_OFFSET) =
> > (value))
> > > > +
> > > > +#define UART_STATUS(base) \
> > > > +   (*(volatile unsigned int *)((base) + UART_SR_OFFSET))
> > > 
> > > You could probably make these static inline functions in the header
> > and
> > > use __raw_{readl,writel}() to make this a little cleaner.
> > > 
> > 
> > I had considered that, but it wasn't clear to me at the time what the
> > compressor could use or not.
> > 
> > I'll give it a try as I agree that's cleaner.
> 
> Actually, for correctness you should use the regular readl/writel, not
> the __raw_ versions, which can result in reordered or partial accesses
> on the bus.

Not in the decompressor.  readl/writel are unsupported there - the
decompressor doesn't have the L2 cache support code and so the barriers
necessary for readl/writel cause link errors.
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