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Message-ID: <4D5C93B6.5020900@zytor.com>
Date: Wed, 16 Feb 2011 19:19:18 -0800
From: "H. Peter Anvin" <hpa@...or.com>
To: Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
CC: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>,
Will Newton <will.newton@...il.com>,
Steven Rostedt <rostedt@...dmis.org>,
Will Simoneau <simoneau@....uri.edu>,
David Miller <davem@...emloft.net>, matt@...sole-pimps.org,
peterz@...radead.org, jbaron@...hat.com, mingo@...e.hu,
tglx@...utronix.de, andi@...stfloor.org, roland@...hat.com,
rth@...hat.com, fweisbec@...il.com, avi@...hat.com,
sam@...nborg.org, ddaney@...iumnetworks.com,
michael@...erman.id.au, linux-kernel@...r.kernel.org,
vapier@...too.org, cmetcalf@...era.com, dhowells@...hat.com,
schwidefsky@...ibm.com, heiko.carstens@...ibm.com,
benh@...nel.crashing.org, 2nddept-manager@....hitachi.co.jp
Subject: Re: [PATCH 0/2] jump label: 2.6.38 updates
On 02/16/2011 05:55 PM, Masami Hiramatsu wrote:
>
> Hmm, I think that is miss-coding ll/sc.
> If I understand correctly, usually cache invalidation should be done
> right before storing value, as MSI protocol does.
> (or, sc should atomically invalidate the cache line)
>
I suspect in this case one should flush the cache line before ll (a
cache flush will typically invalidate the ll/sc link.)
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
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