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Message-Id: <1298221052.2318.69.camel@localhost>
Date: Mon, 21 Feb 2011 00:57:32 +0800
From: Lin Ming <ming.m.lin@...el.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Ingo Molnar <mingo@...e.hu>,
Stephane Eranian <eranian@...gle.com>,
Andi Kleen <andi@...stfloor.org>
Cc: linux-kernel <linux-kernel@...r.kernel.org>
Subject: [PATCH 4/6] perf: Check if HT is supported
Avoid the percore allocations if HT is not supported.
Signed-off-by: Lin Ming <ming.m.lin@...el.com>
---
arch/x86/kernel/cpu/perf_event_intel.c | 23 +++++++++++++++++------
1 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index c2ae5c2..059c0ab 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1086,10 +1086,18 @@ static __initconst const struct x86_pmu core_pmu = {
.event_constraints = intel_core_event_constraints,
};
+static bool ht_capable(void)
+{
+ return boot_cpu_has(X86_FEATURE_HT) && smp_num_siblings > 1;
+}
+
static int intel_pmu_cpu_prepare(int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+ if (!ht_capable())
+ return NOTIFY_OK;
+
cpuc->per_core = kzalloc_node(sizeof(struct intel_percore),
GFP_KERNEL, cpu_to_node(cpu));
if (!cpuc->per_core)
@@ -1106,6 +1114,15 @@ static void intel_pmu_cpu_starting(int cpu)
int core_id = topology_core_id(cpu);
int i;
+ init_debug_store_on_cpu(cpu);
+ /*
+ * Deal with CPUs that don't clear their LBRs on power-up.
+ */
+ intel_pmu_lbr_reset();
+
+ if (!ht_capable())
+ return;
+
for_each_online_cpu(i) {
struct intel_percore *pc = per_cpu(cpu_hw_events, i).per_core;
@@ -1118,12 +1135,6 @@ static void intel_pmu_cpu_starting(int cpu)
cpuc->per_core->core_id = core_id;
cpuc->per_core->refcnt++;
-
- init_debug_store_on_cpu(cpu);
- /*
- * Deal with CPUs that don't clear their LBRs on power-up.
- */
- intel_pmu_lbr_reset();
}
static void intel_pmu_cpu_dying(int cpu)
--
1.7.3
--
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