linux-kernel - Re: [PATCH 03/11] x86/dtb: Add a device tree for CE4100

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Message-ID: <AANLkTi=t-tN9hopx6quXUWeuGcDEPBguaJfAQJ-UQArW@mail.gmail.com>
Date:	Tue, 22 Feb 2011 13:59:42 -0700
From:	Grant Likely <grant.likely@...retlab.ca>
To:	Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Cc:	linux-kernel@...r.kernel.org, sodaville@...utronix.de,
	devicetree-discuss@...ts.ozlabs.org, x86@...nel.org
Subject: Re: [PATCH 03/11] x86/dtb: Add a device tree for CE4100

On Tue, Feb 22, 2011 at 1:07 PM, Sebastian Andrzej Siewior
<bigeasy@...utronix.de> wrote:
> History:
> v1..v2:
> - dropped device_type except for cpu & pci. I have the compatible string
>  for pci so I can drop the device_type once it is possible
> - I lowercased all compatible types. I will need to resend some patches
>  which have upper case intel
> - The cpu had the same compatible string as the soc node. So I added to
>  the soc node -immr for internel memory mapped registers.
> - I added generic names for all parts.
> - I reworked the i2c bars matching the way you suggested. I added a
>  compatible node for the PCI device which only the PCI ids in its
>  compatible string. The bars (each represents a complete i2c
>  controller) have a "intel,ce4100-i2c-controller" compatible node. It
>  is not used by the driver.
>  The driver is probed via PCI ids (by the pci subsystem not OF) and
>  matches the bar address against the ressource in the child node. Once
>  there is a hit the node is attached.
> - The SPI driver is also probed via pci. However I also attached a
>  compatible property based on PCI ids
>
> v2..v3:
> - intel,ce4100-immr become intel,ce4100-cp. cp stands for core
>  peripherals. The Atom data sheet talks here about ACPI devices. Since
>  we don't have ACPI this does not apply here.
> - The interrupt map is gone. There are now plenty of device nodes.
> - The "unit address string" got fixed, it uses not DD,V format.
>
> v3..v4:
> - added descriptions for compatible nodes introduced here:
>  - intel,ce4100-ioapic
>  - intel,ce4100-lapic
>  - intel,ce4100-hpet
>  - intel,ce4100
>  - intel,ce4100-cp
>  - intel,ce4100-pci
> - added a description about I2C controller magic.
> - Added gpio-controller and gpio-cells property to gpio devices. Those
>  properties are not (yet) used.
>
> Cc: devicetree-discuss@...ts.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@...il.com>

Acked-by: Grant Likely <grant.likely@...retlab.ca>

plus one note below...

> ---
>  .../devicetree/bindings/i2c/ce4100-i2c.txt         |   93 +++++
>  Documentation/devicetree/bindings/x86/ce4100.txt   |   38 ++
>  .../devicetree/bindings/x86/interrupt.txt          |   29 ++
>  Documentation/devicetree/bindings/x86/timer.txt    |    6 +
>  arch/x86/platform/ce4100/falconfalls.dts           |  430 ++++++++++++++++++++

Next step will be to migrate most of the static soc data out of this
file and into a .dts include file so that multiple boards can use it;
but that can be done later (it's a relatively new feature to dtc).
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