linux-kernel - Re: [PATCH 5/6] x86, NMI: Allow NMI reason io port (0x61) to be processed on any CPU

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Message-ID: <AANLkTi==WbHfLrWAjFCZU9VAhfyf9MLnvKza=i9PuO7r@mail.gmail.com>
Date:	Sat, 26 Feb 2011 19:19:13 +0800
From:	huang ying <huang.ying.caritas@...il.com>
To:	Cyrill Gorcunov <gorcunov@...il.com>
Cc:	"Maciej W. Rozycki" <macro@...ux-mips.org>,
	Don Zickus <dzickus@...hat.com>, x86@...nel.org,
	Peter Zijlstra <peterz@...radead.org>,
	Robert Richter <robert.richter@....com>, ying.huang@...el.com,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/6] x86, NMI: Allow NMI reason io port (0x61) to be
 processed on any CPU

Hi,

On Sat, Feb 26, 2011 at 4:02 PM, Cyrill Gorcunov <gorcunov@...il.com> wrote:
> On 02/23/2011 05:39 AM, Maciej W. Rozycki wrote:
> ...
>>
>>  [Catching up with old e-mail...]
>>
>>  In line with the comment above that you're removing -- have you (or
>> anyone else) adjusted code elsewhere so that external NMIs are actually
>> delivered to processors other than the BSP?  I can't see such code in this
>> series nor an explanation as to why it wouldn't be needed.
>>
>>  For the record -- the piece of code above reflects our setup where the
>> LINT1 input is enabled and configured for the NMI delivery mode on the BSP
>> only and all the other processors have this line disabled in their local
>> APIC units.  If system NMIs are to be handled after the removal of the
>> BSP, then another processor has to be selected and configured for NMI
>> reception.  Alternatively, all local units could have their LINT1 input
>> enabled and arbitrate handling, although it would be quite disruptive as
>> all the processors would take the interrupt if it happened.  OTOH it would
>> be more fault-tolerant in the case of a CPU failure.  On a typical x86 box
>> the system NMI cannot be routed to an I/O APIC input.
>>
>>   Maciej
>
>  Hi Maciej, good catch! The code doesn't reconfig LVT. As just Don pointed
> it might be Intel is working on something, dunno. Probably we better should
> drop this patch for now (at least until LVT reconfig would not be
> implemented).

Why?  Without LVT reconfig, system with this patch can not work
properly?  This is just one of the steps to make CPU 0 hot-removable.
We must enable CPU 0 hot-removing in one step?

Best Regards,
Huang Ying
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