linux-kernel - [tip:x86/urgent] x86, AMD: Set ARAT feature on AMD processors

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Date:	Wed, 16 Mar 2011 13:57:04 GMT
From:	tip-bot for Boris Ostrovsky <boris.ostrovsky@....com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	andreas.herrmann3@....com, boris.ostrovsky@....com,
	mark.langsdorf@....com, tglx@...utronix.de, mingo@...e.hu,
	borislav.petkov@....com
Subject: [tip:x86/urgent] x86, AMD: Set ARAT feature on AMD processors

Commit-ID:  b87cf80af3ba4b4c008b4face3c68d604e1715c6
Gitweb:     http://git.kernel.org/tip/b87cf80af3ba4b4c008b4face3c68d604e1715c6
Author:     Boris Ostrovsky <boris.ostrovsky@....com>
AuthorDate: Tue, 15 Mar 2011 12:13:44 -0400
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Wed, 16 Mar 2011 14:03:33 +0100

x86, AMD: Set ARAT feature on AMD processors

Support for Always Running APIC timer (ARAT) was introduced in
commit db954b5898dd3ef3ef93f4144158ea8f97deb058. This feature
allows us to avoid switching timers from LAPIC to something else
(e.g. HPET) and go into timer broadcasts when entering deep
C-states.

AMD processors don't provide a CPUID bit for that feature but
they also keep APIC timers running in deep C-states (except for
cases when the processor is affected by erratum 400). Therefore
we should set ARAT feature bit on AMD CPUs.

Tested-by: Borislav Petkov <borislav.petkov@....com>
Acked-by: Andreas Herrmann <andreas.herrmann3@....com>
Acked-by: Mark Langsdorf <mark.langsdorf@....com>
Acked-by: Thomas Gleixner <tglx@...utronix.de>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@....com>
LKML-Reference: <1300205624-4813-1-git-send-email-ostr@...64.org>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/amd.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 7c7bedb..48eaa1b 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -594,6 +594,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 		}
 	}
 #endif
+
+	/* As a rule processors have APIC timer running in deep C states */
+	if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400))
+		set_cpu_cap(c, X86_FEATURE_ARAT);
 }
 
 #ifdef CONFIG_X86_32
--
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