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Message-ID: <AANLkTin6kg84P50RHR7h6NG+P_nJK=N_Nefc1q4NxzY_@mail.gmail.com>
Date: Mon, 28 Mar 2011 19:48:34 +0100
From: Luke Kenneth Casson Leighton <luke.leighton@...il.com>
To: paulmck@...ux.vnet.ibm.com
Cc: Alan Cox <alan@...rguk.ukuu.org.uk>,
Will Newton <will.newton@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: advice sought: practicality of SMP cache coherency implemented in
assembler (and a hardware detect line)
On Mon, Mar 28, 2011 at 7:06 PM, Paul E. McKenney
<paulmck@...ux.vnet.ibm.com> wrote:
>> Basically it would become a cluster with a very very fast "page transfer"
>> operation for moving data between nodes.
>
> This works for applications coded specially for this platform, but unless
> I am missing something, not for existing pthreads applications. Might
> be able to handle things like Erlang that do parallelism without shared
> memory.
ok - well, having thought about this a little bit (in a non-detailed
high-level way) i was sort-of hoping, as alan hinted at, to still do
SMP, even if it's slow, for userspace. the primary thing to prevent
from happening is to have kernelspace data structures from
conflicting.
i found kerrigan, btw, spoke to the people on it: louis agreed that
the whole idea was mad as hell and was therefore actually very
interesting to attempt :)
as a first approximation i'm absolutely happy for existing pthreads
applications to be forced to run on the same core.
l.
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