linux-kernel - Re: advice sought: practicality of SMP cache coherency implemented in assembler (and a hardware detect line)

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Message-ID: <20110328235338.GS2287@linux.vnet.ibm.com>
Date:	Mon, 28 Mar 2011 16:53:38 -0700
From:	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To:	Luke Kenneth Casson Leighton <luke.leighton@...il.com>
Cc:	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Will Newton <will.newton@...il.com>,
	linux-kernel@...r.kernel.org
Subject: Re: advice sought: practicality of SMP cache coherency implemented
 in assembler (and a hardware detect line)

On Tue, Mar 29, 2011 at 12:39:30AM +0100, Luke Kenneth Casson Leighton wrote:
> On Tue, Mar 29, 2011 at 12:38 AM, Luke Kenneth Casson Leighton
> <luke.leighton@...il.com> wrote:
> 
> >  p.s. alan am not ignoring what you wrote, it's just that if this goes
> 
>  alan? beh??  paul.  sorry :)

;-)

FWIW, I believe that the http://www.scalemp.com/ folks do something
similar to what Alan suggests in order to glue multiple x86 systems into
one SMP system from the viewpoint of user applications.

							Thanx, Paul
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