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Message-ID: <807f31a6-c9ff-4f35-bece-e0222a8e1fda@VA3EHSMHS006.ehs.local>
Date:	Wed, 30 Mar 2011 07:37:10 -0600
From:	John Linn <John.Linn@...inx.com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <linux@....linux.org.uk>,
	<catalin.marinas@....com>, <glikely@...retlab.ca>,
	<jamie@...ieiles.com>
Subject: RE: [PATCH V5 3/4] ARM: Xilinx: base header files and assembly macros

> -----Original Message-----
> From: Arnd Bergmann [mailto:arnd@...db.de]
> Sent: Wednesday, March 30, 2011 7:29 AM
> To: John Linn
> Cc: linux-arm-kernel@...ts.infradead.org;
linux-kernel@...r.kernel.org;
> linux@....linux.org.uk; catalin.marinas@....com; glikely@...retlab.ca;
> jamie@...ieiles.com
> Subject: Re: [PATCH V5 3/4] ARM: Xilinx: base header files and
assembly
> macros
> 
> On Wednesday 30 March 2011, John Linn wrote:
> > Yes that makes sense.  We don't have immediate plans for PCI and
> > I was assuming when we add PCI we would need to change that.
> >
> > If you think I shouldn't put it off then I'll fix it now.  My
> > preference was to get the platform supported, then add more
features.
> 
> Getting it fixed properly depends a bit on the PCI implementation.
> I've been planning to clean up this part of the ARM architecture
> for some time and I can probably do it for one more platform when
> I get to it.

Sounds like it's fine to postpone it til we do PCI as I don't know all
the
details of the system yet. Soft logic in FPGAs is great :)

> 
> My idea for the multiplatform kernel is to have a global I/O space
> window (maybe 1 MB) that is in the same location in the virtual
> address space all the time, so any platform that wants to support
> PCI with direct-mapped I/O space can simply map it in there
> at boot time.
> 

Sounds like that will make it easier for everyone and more consistent.

Thanks,
John

> 	Arnd


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