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Message-ID: <20110403152244.GC5670@pulham.picochip.com>
Date: Sun, 3 Apr 2011 16:22:44 +0100
From: Jamie Iles <jamie@...ieiles.com>
To: Grant Likely <grant.likely@...retlab.ca>
Cc: Jamie Iles <jamie@...ieiles.com>,
Anton Vorontsov <cbouatmailru@...il.com>,
Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>,
Russell King <linux@....linux.org.uk>,
Arnd Bergmann <arnd@...db.de>, Nicolas Pitre <nico@...xnic.net>
Subject: Re: [PATCH] gpio: support for Synopsys DesignWare APB GPIO
Hi Grant,
On Sun, Apr 03, 2011 at 08:47:25AM -0600, Grant Likely wrote:
> On Sun, Apr 3, 2011 at 8:07 AM, Jamie Iles <jamie@...ieiles.com> wrote:
> > My first idea would be to have something like:
> >
> > struct mmio_gpio_bank {
> > unsigned int ngpio;
> > unsigned long set_offs;
> > unsigned long clr_offs;
> > unsigned long dout_offs;
> > unsigned long din_offs;
> > unsigned long dir_offs;
> > };
> >
> > struct mmio_gpio_pdata {
> > size_t bus_width_bits;
> > int gpio_base;
> > unsigned int nr_banks;
> > struct mmio_gpio_bank banks[];
> > };
>
> As discussed earlier in the thread, you probably don't need to support
> multiple banks with this driver. Instead, create a separate device
> instance for each bank.
The reason I proposed this was for controllers where the registers
aren't grouped together for each bank. For example, the Synopsys block
has:
0x00-0x08 bank A control registers
0x0c-0x14 bank B control registers
...
0x50 bank A input register
0x54 bank B input register.
So when you mentioned before using a single register resource with
offsets I understood it to be something like what I've proposed
otherwise multiple banks would have overlapping resources (or the
resource would just be used to indicate the start address rather than
start + end).
Also, it's not clear here but this would create one gpio_chip per bank.
Jamie
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