linux-kernel - Re: [PATCH] OMAP: iommu flush page table entries from L1 and L2 cache

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Message-ID: <20110415081253.GA18952@n2100.arm.linux.org.uk>
Date:	Fri, 15 Apr 2011 09:12:54 +0100
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	KyongHo Cho <pullip.cho@...sung.com>
Cc:	Fernando Guzman Lugo <fernando.lugo@...com>,
	linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, tony@...mide.com,
	Ramesh Gupta <grgupta@...com>,
	Hari Kanigeri <h-kanigeri2@...com>
Subject: Re: [PATCH] OMAP: iommu flush page table entries from L1 and L2
	cache

On Fri, Apr 15, 2011 at 11:24:16AM +0900, KyongHo Cho wrote:
> That means we need to translate logical to physical address and it is
> sometimes not trivial.

What do you mean "sometimes not trivial" ?  The DMA does nothing more
than virt_to_phys(virt) to get the physical address.  It's _that_ simple.

If virt_to_phys(virt) is likely to fail, there's protection in the DMA API
to BUG_ON() in that case.

> Finally, the kernel will contain many similar routines that do same thing.

So when we get coherent DMA, you won't care that the DMA API functions
start doing nothing with caches?
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