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Message-ID: <1303522710.2796.221.camel@work-vm>
Date: Fri, 22 Apr 2011 18:38:30 -0700
From: john stultz <johnstul@...ibm.com>
To: Kasper Pedersen <kernel@...perkp.dk>
Cc: Josh Triplett <josh@...htriplett.org>,
linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Suresh Siddha <suresh.b.siddha@...el.com>
Subject: Re: x86: tsc: v2 make TSC calibration more immune to interrupts
On Thu, 2011-04-21 at 21:46 +0200, Kasper Pedersen wrote:
> On 04/21/2011 12:39 AM, Josh Triplett wrote:
> >
> > Have you considered disabling interrupts while calibrating? That would
> > ensure that you only have to care about SMIs, not arbitrary interrupts.
> >
> > Also, on more recent x86 systems you could look at MSR_SMI_COUNT (MSR
> > 0x34) to detect if any SMIs have occurred during the sample period.
> > rdmsr, start sample period, stop sample period, rdmsr, if delta of 0
> > then no SMIs occurred. Exists on Nehalem and newer, at least.
>
>
> I have now tested this, and it is worth doing.
Cool! When you have the chance, send out your latest patch and I'll
review/ack and hopefully queue it for tglx.
thanks
-john
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