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Message-ID: <20110425180528.GA30724@elte.hu>
Date:	Mon, 25 Apr 2011 20:05:28 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Dehao Chen <danielcdh@...il.com>
Cc:	Andi Kleen <ak@...ux.intel.com>,
	Peter Zijlstra <peterz@...radead.org>, arun@...rma-home.net,
	Stephane Eranian <eranian@...gle.com>,
	Arnaldo Carvalho de Melo <acme@...radead.org>,
	linux-kernel@...r.kernel.org, Lin Ming <ming.m.lin@...el.com>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>, eranian@...il.com,
	Arun Sharma <asharma@...com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [generalized cache events] Re: [PATCH 1/1] perf tools: Add
 missing user space support for config1/config2


* Dehao Chen <danielcdh@...il.com> wrote:

> > ... and the resulting low level of noise in the average period length is 
> > what matters. The instruction itself will still be one of the hotspot 
> > instructions, statistically.
> 
> Not true. This skid will lead to some aggregation and shadow effects on some 
> certain instructions. To make things worse, these effects are deterministic 
> and cannot be removed by either sampling for multiple times or by averaging 
> among instructions within a basic block. As a result, some actual "hot spot" 
> are not sampled at all. You can simply try to collect a basic block level 
> CPI, and you'll get a very misleading profile.

This certainly does not match the results i'm seeing on real applications, 
using "-e instructions:pp" PEBS+LBR profiling. How do you explain that? Also, 
can you demonstrate your claim with a real example?

Thanks,

	Ingo
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