linux-kernel - Re: [PATCH 1/1] perf tools: Add missing user space support for config1/config2

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Message-ID: <1303811345.20212.232.camel@twins>
Date:	Tue, 26 Apr 2011 11:49:05 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Vince Weaver <vweaver1@...s.utk.edu>
Cc:	Ingo Molnar <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...radead.org>,
	linux-kernel@...r.kernel.org, Andi Kleen <ak@...ux.intel.com>,
	Stephane Eranian <eranian@...il.com>,
	Lin Ming <ming.m.lin@...el.com>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 1/1] perf tools: Add missing user space support for
 config1/config2

On Mon, 2011-04-25 at 17:46 -0400, Vince Weaver wrote:
> > The policy is very simple and common-sense: if a given piece of PMU 
> > functionality is useful enough to be exposed via a raw interface, then
> > it must be useful enough to be generalized as well.
> 
> what does that even mean?  How do you "generalize" a functionality like 
> writing a value to an auxiliary MSR register? 

Come-on Vince, I know you're smarter than that!

The external register is simply an extension of the configuration space,
instead of the normal evsel msr you get evsel:offcore pairs. After that
its simply scheduling them right.

It simply adds more events to the PMU (in a rather sad way, it would
have been so much nicer if Intel had simply extended the evsel MSR for
every PMC, they could have also used that for the load-latency thing
etc.)

Now, these extra events offered are L3 and NUMA events, the 'common'
interesting set is mostly covered by Andi's LLC mods and my NODE
extension, after that there's mostly details left in offcore.

So the writing of an extra MSR is totally irrelevant, its the extra
events that are.
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