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Message-ID: <20110427132053.GD2936@mgebm.net>
Date: Wed, 27 Apr 2011 09:20:54 -0400
From: Eric B Munson <emunson@...bm.net>
To: David Laight <David.Laight@...LAB.COM>
Cc: benh@...nel.crashing.org, a.p.zijlstra@...llo.nl, paulus@...ba.org,
mingo@...e.hu, acme@...stprotocols.net,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
anton@...ba.org, stable@...nel.org
Subject: Re: [PATCH V4] POWER: perf_event: Skip updating kernel counters if
register value shrinks
On Wed, 27 Apr 2011, David Laight wrote:
>
> > prev and val are both 64 bit variables holding 32 bit numbers, we do
> not
> > accumulate in either, they are both replaced by values directly from
> the
> > registers.
> > So prev > val will not always be true.
>
> The code seems to be:
> prev = local64_read(&event->hw.prev_count);
> val = read_pmc(event->hw.idx);
> delta = check_and_compute_delta(prev, val);
> local64_add(delta, &event->count);
> Which looks very much like 'prev' being a 64bit counter generated
> from the 32bit pmc register.
>
Which implies that it will only ever be 32 bits wide, just stored in 64.
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