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Message-ID: <4DB851CE.7090503@gmail.com>
Date: Wed, 27 Apr 2011 21:26:38 +0400
From: Cyrill Gorcunov <gorcunov@...il.com>
To: Don Zickus <dzickus@...hat.com>
CC: x86@...nel.org, LKML <linux-kernel@...r.kernel.org>,
Ingo Molnar <mingo@...e.hu>
Subject: Re: [PATCH] perf, nmi: Move LVT un-masking into irq handlers
On 04/27/2011 02:32 PM, Don Zickus wrote:
> It was noticed that P4 machines were generating double NMIs for each
> perf event. These extra NMIs lead to 'Dazed and confused' messages on
> the screen.
>
> I tracked this down to a P4 quirk that said the overflow bit had to be
> cleared before re-enabling the apic LVT mask. My first attempt was
> to move the un-masking inside the perf nmi handler from before the
> chipset NMI handler to after.
>
> This broke Nehalem boxes that seem to like the unmasking before the
> counters themselves are re-enabled.
>
> In order to keep this change simple for 2.6.39, I decided to just
> simply move the apic LVT un-masking to the beginning of all the
> chipset NMI handlers, with the exception of Pentium4's to fix the
> double NMI issue.
>
> Later on we can move the un-masking to later in the handlers to save
> a number of 'extra' NMIs on those particular chipsets.
>
> I tested this change on a P4 machine, an AMD machine, a Nehalem box,
> and a core2quad box. 'perf top' worked correctly along with various
> other small 'perf record' runs. Anything high stress breaks all the
> machines but that is a different problem.
>
> Thanks to various people for testing different versions of this patch.
>
> Reported-and-tested-by: Shaun Ruffell <sruffell@...ium.com>
> Signed-off-by: Don Zickus <dzickus@...hat.com>
> CC: Cyrill Gorcunov <gorcunov@...il.com>
>
> ---
> Originally I was going to bundle this with Cyrill's P4 alias patch but that
> may take awhile, so I am posting this stand alone for now. Sorry for the
> delay.
>
Looks good to me, thanks a lot Don! I'll send you updated alternate events
patch.
--
Cyrill
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