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Message-ID: <1303940737.2513.190.camel@pasglop> Date: Thu, 28 Apr 2011 07:45:37 +1000 From: Benjamin Herrenschmidt <benh@...nel.crashing.org> To: Catalin Marinas <catalin.marinas@....com> Cc: Arnd Bergmann <arnd@...db.de>, linaro-mm-sig@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [RFC] ARM DMA mapping TODO, v1 On Wed, 2011-04-27 at 10:52 +0100, Catalin Marinas wrote: > > It's not broken since we moved to using Normal non-cacheable memory > for the coherent DMA buffers (as long as you flush the cacheable alias > before using the buffer, as we already do). The ARM ARM currently says > unpredictable for such situations but this is being clarified in > future updates and the Normal non-cacheable vs cacheable aliases can > be used (given correct cache maintenance before using the buffer). Don't you have a risk where speculative loads or prefetches might bring back some stuff into the cache via the cachable mapping ? Is that an issue ? As long as it's non-dirty and the cachable mapping isn't otherwise used, I suppose it might be a non-issue, tho I've seen in powerpc land cases of processors that can checkstop if a subsequent non cachable access "hits" the stuff that was loaded in the cache. Cheers, Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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