linux-kernel - [tip:perf/stat] perf events, x86: Add Westmere stalled-cycles-frontend/backend events

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Message-ID: <tip-7y40wib8n008io7hjpn1dsrm@git.kernel.org>
Date:	Fri, 29 Apr 2011 14:28:12 GMT
From:	tip-bot for Ingo Molnar <mingo@...e.hu>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, acme@...hat.com, hpa@...or.com,
	mingo@...hat.com, a.p.zijlstra@...llo.nl, fweisbec@...il.com,
	dsahern@...il.com, tglx@...utronix.de, mingo@...e.hu
Subject: [tip:perf/stat] perf events, x86: Add Westmere stalled-cycles-frontend/backend events

Commit-ID:  301120396b766ae4480e52ece220516a1707822b
Gitweb:     http://git.kernel.org/tip/301120396b766ae4480e52ece220516a1707822b
Author:     Ingo Molnar <mingo@...e.hu>
AuthorDate: Sat, 30 Apr 2011 09:14:54 +0200
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Fri, 29 Apr 2011 16:22:37 +0200

perf events, x86: Add Westmere stalled-cycles-frontend/backend events

Extend the Intel Westmere PMU driver with definitions for generic front-end and
back-end stall events.

( These are only approximations. )

Reported-by: David Ahern <dsahern@...il.com>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Frederic Weisbecker <fweisbec@...il.com>
Link: http://lkml.kernel.org/n/tip-7y40wib8n008io7hjpn1dsrm@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event_intel.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 7983b9a..be8363a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1458,6 +1458,12 @@ static __init int intel_pmu_init(void)
 		x86_pmu.enable_all = intel_pmu_nhm_enable_all;
 		x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
 		x86_pmu.extra_regs = intel_westmere_extra_regs;
+
+		/* UOPS_ISSUED.STALLED_CYCLES */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
+		/* UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 */
+		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x1803fb1;
+
 		pr_cont("Westmere events, ");
 		break;
 
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