linux-kernel - Re: perf stat branch: perf stat fails on unsupported event

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Message-ID: <4DBACF9F.1080200@gmail.com>
Date:	Fri, 29 Apr 2011 08:47:59 -0600
From:	David Ahern <dsahern@...il.com>
To:	Ingo Molnar <mingo@...e.hu>
CC:	LKML <linux-kernel@...r.kernel.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Thomas Gleixner <tglx@...utronix.de>,
	Frédéric Weisbecker <fweisbec@...il.com>
Subject: Re: perf stat branch: perf stat fails on unsupported event



On 04/29/11 08:20, Ingo Molnar wrote:
> 
> * David Ahern <dsahern@...il.com> wrote:
> 
>> This is a Dell R410 with an E5620 processor.
> 
> That's a Westmere CPU.
> 
> Could you check whether the patch below applied to latest -tip gives you 
> stalled-cycles-frontend and stalled-cycles-backend events?

yes, it does. And I see it's been committed already. ;-)

> 
> Thanks,
> 
> 	Ingo
> 
> --------------->
> From 3808ae38f1905c1f11da46ac981c8d2579936fd8 Mon Sep 17 00:00:00 2001
> From: Ingo Molnar <mingo@...e.hu>
> Date: Sat, 30 Apr 2011 09:14:54 +0200
> Subject: [PATCH] perf events, x86: Add Westmere stalled-cycles-frontend/backend events
> 
> Extend the Intel Westmere PMU driver with definitions for generic front-end and
> back-end stall events.
> 
> ( These are only approximations. )
> 
> Reported-by: David Ahern <dsahern@...il.com>
> Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
> Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
> Cc: Frederic Weisbecker <fweisbec@...il.com>
> Link: http://lkml.kernel.org/n/tip-7y40wib8n008io7hjpn1dsrm@git.kernel.org
> Signed-off-by: Ingo Molnar <mingo@...e.hu>
> ---
>  arch/x86/kernel/cpu/perf_event_intel.c |    6 ++++++
>  1 files changed, 6 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> index 7983b9a..be8363a 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -1458,6 +1458,12 @@ static __init int intel_pmu_init(void)
>  		x86_pmu.enable_all = intel_pmu_nhm_enable_all;
>  		x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
>  		x86_pmu.extra_regs = intel_westmere_extra_regs;
> +
> +		/* UOPS_ISSUED.STALLED_CYCLES */
> +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
> +		/* UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 */
> +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x1803fb1;
> +
>  		pr_cont("Westmere events, ");
>  		break;
>  
--
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