linux-kernel - Re: [PATCH v4 08/11] tty: add pruss SUART driver

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Message-ID: <AD18C961F5D84B92B2611F80E80B3D6F@subhasishg>
Date:	Mon, 2 May 2011 14:04:11 +0530
From:	"Subhasish Ghosh" <subhasish@...tralsolutions.com>
To:	"Nori, Sekhar" <nsekhar@...com>, "Greg KH" <gregkh@...e.de>
Cc:	"Greg KH" <greg@...ah.com>,
	<davinci-linux-open-source@...ux.davincidsp.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	"Watkins, Melissa" <m-watkins@...com>,
	<sachi@...tralsolutions.com>,
	"Andrew Morton" <akpm@...ux-foundation.org>,
	"Randy Dunlap" <randy.dunlap@...cle.com>,
	"open list" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 08/11] tty: add pruss SUART driver


> Hi Subhasish,
> 
> On Wed, Apr 27, 2011 at 18:45:06, Subhasish Ghosh wrote:
>>  >> >>The driver should probably just get sram
>> >> >> space through platform data so that it doesn't depend on the
>> >> >> platform specific sram allocation function.
>> >>
>> >> Are you suggesting that I go back to that implementation.
>> >
>> > No, the platform code should use the SRAM allocator and
>> > pass on the allocated memory to the driver.
>> 
>> SG - So, should I call the sram_alloc() in the platform setup function. 
> 
> Can you please shed some light on how SRAM
> is being used in the driver? Looking at the
> driver, it looks like it is used as a shared
> buffer between the PRU firmware and kernel.
> 
> If yes, how do you cope with dynamic allocation
> of SRAM? That is, how do you inform the firmware
> what portion of SRAM has been allocated to the
> driver?
> 
> Also, usage of SRAM is not required for basic driver
> function, correct? So, a platform which does not
> have SRAM to spare for this driver could still have
> a portion of SDRAM/DDR allocated to be used as the
> shared buffer? I guess SRAM was used only for lower
> access times. But it should still be possible to
> sustain lower baudrates with SDRAM/DDR?

The sram is allocated dynamically in the driver. 
After allocation, we write the pointer into the PRU, so in case the
driver allocates memory form the DDR, it will write this info into the
PRU and it will work. But, because of DDR access latencies, the UART
will work only for lower baud rates. 
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