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Message-Id: <1304689466.2200.1.camel@localhost>
Date:	Fri, 06 May 2011 21:44:26 +0800
From:	Lin Ming <ming.m.lin@...el.com>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Mike Galbraith <efault@....de>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Frédéric Weisbecker <fweisbec@...il.com>,
	Steven Rostedt <rostedt@...dmis.org>
Subject: Re: [PATCH] perf events, x86: Add SandyBridge
 stalled-cycles-frontend/backend events

On Fri, 2011-05-06 at 15:43 +0800, Lin Ming wrote:
> On Fri, 2011-05-06 at 15:38 +0800, Ingo Molnar wrote:
> > * Lin Ming <ming.m.lin@...el.com> wrote:
> > 
> > > Extend the Intel SandyBridge PMU driver with definitions
> > > for generic front-end and back-end stall events.
> > > 
> > > ( As commit 3011203 says, these are only approximations. )
> > > 
> > > Signed-off-by: Lin Ming <ming.m.lin@...el.com>
> > > ---
> > >  arch/x86/kernel/cpu/perf_event_intel.c |    6 ++++++
> > >  1 files changed, 6 insertions(+), 0 deletions(-)
> > > 
> > > diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> > > index c1ec7a5..61cbf48 100644
> > > --- a/arch/x86/kernel/cpu/perf_event_intel.c
> > > +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> > > @@ -1485,6 +1485,12 @@ static __init int intel_pmu_init(void)
> > >  
> > >  		x86_pmu.event_constraints = intel_snb_event_constraints;
> > >  		x86_pmu.pebs_constraints = intel_snb_pebs_events;
> > > +
> > > +		/* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
> > > +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x180010e;
> > > +		/* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
> > > +		intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x18001b1;
> > > +
> > 
> > Nice!
> > 
> > Could you check Intel Atom perhaps as well, does it have any useful event to 
> > approximate this?
> 
> OK, let me check.

Checked, but don't find this kind of event.

> 
> > 
> > Thanks,
> > 
> > 	Ingo
> 


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