linux-kernel - Re: [PATCH v1 0/5] KVM in-guest performance monitoring

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Message-ID: <4DCBAD8F.8030006@redhat.com>
Date:	Thu, 12 May 2011 12:51:11 +0300
From:	Avi Kivity <avi@...hat.com>
To:	Joerg Roedel <joro@...tes.org>
CC:	linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
	Ingo Molnar <mingo@...e.hu>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Borislav Petkov <borislav.petkov@....com>
Subject: Re: [PATCH v1 0/5] KVM in-guest performance monitoring

On 05/12/2011 12:33 PM, Joerg Roedel wrote:
> On Wed, May 11, 2011 at 11:55:28AM -0400, Avi Kivity wrote:
> >  This not-for-merging patchset exposes an emulated version 1 architectural
> >  performance monitoring unit to KVM guests.  The PMU is emulated using
> >  perf_events, so the host kernel can multiplex host-wide, host-user, and the
> >  guest on available resources.
> >
> >  Caveats:
> >  - counters that have PMI (interrupt) enabled stop counting after the
> >    interrupt is signalled.  This is because we need one-shot samples
> >    that keep counting, which perf doesn't support yet
> >  - some combinations of INV and CMASK are not supported
> >  - counters keep on counting in the host as well as the guest
> >  - the RDPMC instruction and CR4.PCE bit are not yet emulated
> >  - there is likely a bug in the implementation; running 'perf top' in
> >    a guest that spends 80% of its time in userspace shows perf itself
> >    as consuming almost all cpu
> >
> >  perf maintainers: please consider the first three patches for merging (the
> >  first two make sense even without the rest).  If you're familiar with the Intel
> >  PMU, please review patch 5 as well - it effectively undoes all your work
> >  of abstracting the PMU into perf_events by unabstracting perf_events into what
> >  is hoped is a very similar PMU.
>
> Gaah, I was just about to submit a talk about PMU virtualization for KVM
> Forum :)

Speed matters.

> Anyway, I thought about a paravirt-approach instead of implementing a
> real PMU... But there are certainly good reasons for both.

Note, at this time the architectural PMU is only recognized on an Intel 
host.

Is the statement "if an AMD processor returns non-zero information in 
cpuid leaf 0xa, then that processor will be compatible with other 
vendors' processors reporting the same information" correct?

If so, we can move the detection of the architectural pmu outside the 
cpu vendor checks, and this code will work on both AMD and Intel 
processors (even if the host cpu doesn't have an architectural PMU).

-- 
error compiling committee.c: too many arguments to function

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