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Message-ID: <s5htycp6b25.wl%tiwai@suse.de>
Date: Fri, 20 May 2011 10:17:06 +0200
From: Takashi Iwai <tiwai@...e.de>
To: Clemens Ladisch <clemens@...isch.de>
Cc: Leon Woestenberg <leon.woestenberg@...il.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
linux-pci@...r.kernel.org, linux-mm@...ck.org,
linux-kernel@...r.kernel.org
Subject: Re: mmap() implementation for pci_alloc_consistent() memory?
At Fri, 20 May 2011 08:51:03 +0200,
Clemens Ladisch wrote:
>
> Leon Woestenberg wrote:
> > On Thu, May 19, 2011 at 5:58 PM, Clemens Ladisch <clemens@...isch.de> wrote:
> >>> On Thu, May 19, 2011 at 12:14:40AM +0200, Leon Woestenberg wrote:
> >>> > vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> >>
> >> So is this an architecture without coherent caches?
> >
> > My aim is to have an architecture independent driver.
>
> Please note that most MMU architectures forbid mapping the same memory
> with different attributes, so you must use pgprot_noncached if and only
> if dma_alloc_coherent actually uses it. Something like the code below.
>
> And I'm not sure if you have to do some additional cache flushes when
> mapping on some architectures.
>
> >> Or would you want to use pgprot_dmacoherent, if available?
> >
> > Hmm, let me check that.
>
> It's available only on ARM and Unicore32.
>
> There's also dma_mmap_coherent(), which does exactly what you want if
> your buffer is physically contiguous, but it's ARM only.
> Takashi tried to implement it for other architectures; I don't know
> what came of it.
PPC got this recently (thanks to Ben), but still missing in other
areas.
There was little uncertain issue on MIPS, and it looks difficult to
achieve it on PA-RISC at all. The development was stuck due to lack
of time since then.
Takashi
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