linux-kernel - [tip:x86/urgent] x86, cpufeature: Update CPU feature RDRND to RDRAND

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Date:	Wed, 25 May 2011 04:58:17 GMT
From:	tip-bot for Kees Cook <kees.cook@...onical.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	fenghua.yu@...el.com, kees.cook@...onical.com, tglx@...utronix.de,
	hpa@...ux.intel.com
Subject: [tip:x86/urgent] x86, cpufeature: Update CPU feature RDRND to RDRAND

Commit-ID:  7ccafc5f75c87853f3c49845d5a884f2376e03ce
Gitweb:     http://git.kernel.org/tip/7ccafc5f75c87853f3c49845d5a884f2376e03ce
Author:     Kees Cook <kees.cook@...onical.com>
AuthorDate: Tue, 24 May 2011 16:29:26 -0700
Committer:  H. Peter Anvin <hpa@...ux.intel.com>
CommitDate: Tue, 24 May 2011 16:37:27 -0700

x86, cpufeature: Update CPU feature RDRND to RDRAND

The Intel manual changed the name of the CPUID bit to match the
instruction name. We should follow suit for sanity's sake. (See Intel SDM
Volume 2, Table 3-20 "Feature Information Returned in the ECX Register".)

[ hpa: we can only do this at this time because there are currently no CPUs
  with this feature on the market, hence this is pre-hardware enabling.
  However, Cc:'ing stable so that stable can present a consistent ABI. ]

Signed-off-by: Kees Cook <kees.cook@...onical.com>
Link: http://lkml.kernel.org/r/20110524232926.GA27728@outflux.net
Signed-off-by: H. Peter Anvin <hpa@...ux.intel.com>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: <stable@...nel.org> v2.6.36-39
---
 arch/x86/include/asm/cpufeature.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 5dc6acc..71cc380 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -125,7 +125,7 @@
 #define X86_FEATURE_OSXSAVE	(4*32+27) /* "" XSAVE enabled in the OS */
 #define X86_FEATURE_AVX		(4*32+28) /* Advanced Vector Extensions */
 #define X86_FEATURE_F16C	(4*32+29) /* 16-bit fp conversions */
-#define X86_FEATURE_RDRND	(4*32+30) /* The RDRAND instruction */
+#define X86_FEATURE_RDRAND	(4*32+30) /* The RDRAND instruction */
 #define X86_FEATURE_HYPERVISOR	(4*32+31) /* Running on a hypervisor */
 
 /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
--
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