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Message-ID: <BANLkTi=5DK7XUwQZvC8tSM4vXu5LObBHjQ@mail.gmail.com>
Date:	Mon, 30 May 2011 06:40:03 -0400
From:	Andrew Lutomirski <luto@....edu>
To:	Borislav Petkov <bp@...en8.de>, Andy Lutomirski <luto@....edu>,
	Ingo Molnar <mingo@...e.hu>, x86@...nel.org,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org, Jesper Juhl <jj@...osbits.net>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Arjan van de Ven <arjan@...radead.org>,
	Jan Beulich <JBeulich@...ell.com>,
	richard -rw- weinberger <richard.weinberger@...il.com>,
	Mikael Pettersson <mikpe@...uu.se>
Subject: Re: [PATCH v2 10/10] x86-64: Document some of entry_64.S

On Mon, May 30, 2011 at 3:59 AM, Borislav Petkov <bp@...en8.de> wrote:
> On Sun, May 29, 2011 at 11:48:47PM -0400, Andy Lutomirski wrote:
>> Signed-off-by: Andy Lutomirski <luto@....edu>
>
> Oh yeah!
>
> Acked-by: Borislav Petkov <bp@...en8.de>
>
>> +The x86 architecture has quite a few different ways to jump into
>> +kernel code.  Most of these entry points are registered in
>> +arch/x86/kernel/traps.c and implemented in arch/x86/kernel/entry_64.S
>
> and arch/x86/ia32/ia32entry.S

I was hedging by saying "most".  Will fix.

>> +
>> +There are a few complexities here.  The different x86-64 entries have
>> +different calling conventions.  The syscall and sysenter instructions
>> +have their own peculiar calling conventions.  Some of the IDT entries
>> +push an error code onto the stack; others don't.  IDT entries using
>> +the IST alternative stack mechanism need their own magic to get the
>> +stack frames right.  (You can find some documentation in the Intel
>> +SDM, Volume 3, Chapter 6.)
>
> and the AMD APM Volume 2, Chapter 8.

Of course.  I think I like that version even better.  Page 243 is a
great summary.

(And whose idea was it to have pushing the error code be optional?)


--Andy
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