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Message-ID: <1307112111.2353.3390.camel@twins>
Date: Fri, 03 Jun 2011 16:41:51 +0200
From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: Avi Kivity <avi@...hat.com>
Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
Ingo Molnar <mingo@...e.hu>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>
Subject: Re: [PATCH v1 5/5] KVM: Expose a version 1 architectural PMU to
guests
On Wed, 2011-05-11 at 11:55 -0400, Avi Kivity wrote:
> - counters that have PMI (interrupt) enabled stop counting after the
> interrupt is signalled. This is because we need one-shot samples
> that keep counting, which perf doesn't support yet
You'll have to reprogram the thing anyway, since not all hardware has
the same counter width:
[ 0.046996] Performance Events: AMD PMU driver.
[ 0.048998] ... bit width: 48
vs
[ 0.026998] Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver.
[ 0.026998] ... bit width: 40
simply letting the thing run will not behave in a consistent fashion.
Or are you going to assume all software will properly read the cpuid
leaf and not assume bit width?
Also, I can't seem to locate where you fill that cpuid-leaf,
kvm_pmu_cpuid_update() seems to read the entry, not write it.
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