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Message-ID: <BANLkTingmUNvZO_szivRkmn7LRO4L5A+5Q@mail.gmail.com>
Date:	Sat, 4 Jun 2011 19:37:54 -0700
From:	Colin Cross <ccross@...roid.com>
To:	l-o <linux-omap@...r.kernel.org>
Cc:	Colin Cross <ccross@...roid.com>, Tony Lindgren <tony@...mide.com>,
	Russell King <linux@....linux.org.uk>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	lkml <linux-kernel@...r.kernel.org>,
	Todd Poynor <toddpoynor@...gle.com>
Subject: Re: [PATCH] ARM: omap4: gpio: fix setting IRQWAKEN bits

On Sat, Jun 4, 2011 at 12:03 PM, Colin Cross <ccross@...roid.com> wrote:
> Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits,
> causing only the last bit set to take effect, resulting in lost
> wakeups when the GPIO controller is in idle.
>
> Replace direct writes to IRQWAKEN with writes to SETWKUENA and
> CLEARWKUEN.
>
> Signed-off-by: Colin Cross <ccross@...roid.com>
> ---
>  arch/arm/plat-omap/gpio.c |   14 +++++---------
>  1 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
> index c985652..23ac7b6 100644
> --- a/arch/arm/plat-omap/gpio.c
> +++ b/arch/arm/plat-omap/gpio.c
> @@ -539,7 +539,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>  {
>        void __iomem *base = bank->base;
>        u32 gpio_bit = 1 << gpio;
> -       u32 val;
>
>        if (cpu_is_omap44xx()) {
>                MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
> @@ -563,14 +562,11 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>        if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
>                if (cpu_is_omap44xx()) {
>                        if (trigger != 0)
> -                               __raw_writel(1 << gpio, bank->base+
> -                                               OMAP4_GPIO_IRQWAKEN0);
> -                       else {
> -                               val = __raw_readl(bank->base +
> -                                                       OMAP4_GPIO_IRQWAKEN0);
> -                               __raw_writel(val & (~(1 << gpio)), bank->base +
> -                                                        OMAP4_GPIO_IRQWAKEN0);
> -                       }
> +                               __raw_writel(gpio_bit,
> +                                       bank->base + OMAP4_GPIO_SETWKUENA);
> +                       else
> +                               __raw_writel(gpio_bit,
> +                                       bank->base + OMAP4_GPIO_CLEARWKUENA);

Todd pointed out that the OMAP4 TRM says not to use SETWKUENA and
CLEARWKUENA.  I'll send another patch that applies to v3.0-rc1 that
uses MOD_REG_BIT on IRQWAKEN_0, and another patch that adds the
necessary locking around the read-modify-writes in
_set_gpio_triggering.

>                } else {
>                        /*
>                         * GPIO wakeup request can only be generated on edge
> --
> 1.7.4.1
>
>
--
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