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Message-Id: <4df13bf927261abd27@agluck-desktop.sc.intel.com>
Date: Thu, 09 Jun 2011 14:32:41 -0700
From: "Luck, Tony" <tony.luck@...el.com>
To: "Ingo Molnar" <mingo@...e.hu>, "Borislav Petkov" <bp@...64.org>
Cc: linux-kernel@...r.kernel.org, "Huang, Ying" <ying.huang@...el.com>,
"Hidetoshi Seto" <seto.hidetoshi@...fujitsu.com>,
"Avi Kivity" <avi@...hat.com>
Subject: [PATCH 04/10] MCE: Move ADDR/MISC reading code into common function
From: Andi Kleen <andi@...stfloor.org>
Used for next patch.
Signed-off-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Tony Luck <tony.luck@...el.com>
---
arch/x86/kernel/cpu/mcheck/mce.c | 21 +++++++++++++--------
1 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index cbd4b0f..0349e87 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -532,6 +532,17 @@ static void mce_report_event(struct pt_regs *regs)
#endif
}
+/*
+ * Read ADDR and MISC registers.
+ */
+static void mce_read_aux(struct mce *m, int i)
+{
+ if (m->status & MCI_STATUS_MISCV)
+ m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
+ if (m->status & MCI_STATUS_ADDRV)
+ m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
+}
+
DEFINE_PER_CPU(unsigned, mce_poll_count);
/*
@@ -582,10 +593,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)))
continue;
- if (m.status & MCI_STATUS_MISCV)
- m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
- if (m.status & MCI_STATUS_ADDRV)
- m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
+ mce_read_aux(&m, i);
if (!(flags & MCP_TIMESTAMP))
m.tsc = 0;
@@ -1027,10 +1035,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
if (severity == MCE_AR_SEVERITY)
kill_it = 1;
- if (m.status & MCI_STATUS_MISCV)
- m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
- if (m.status & MCI_STATUS_ADDRV)
- m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
+ mce_read_aux(&m, i);
/*
* Action optional error. Queue address for later processing.
--
1.7.3.1
--
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